ASIC and/or FPGA Design & Verification Engineer (Lead, Senior, Principal) (Hybrid)
Boeing
Mountain View,CA,
ASIC Design Engineer, Hardware Compute Group
Amazon
Sunnyvale,CA,
ASIC Engineer, Design Verification
Meta
Menlo Park,CA,
ASIC Technology Development Engineer
Intel
Santa Clara,CA,
ASIC and/or FPGA Design & Verification Engineer (Lead, Senior, Principal) (Hybrid)
The Boeing Company
Mountain View,CA,
ASIC Formal Verification Engineer
Diverse Lynx
Sunnyvale,CA,
ASIC Chip Lead and Design Engineer (remote)
Chelsea Search Group
Palo Alto,CA,
ASIC Design Engineer
Cisco
San Jose,CA,
Sr. ASIC Design Engineer, DDR IP (Silicon Engineering)
Spacex
Sunnyvale,CA,
Next-Gen, High-Speed Memory Subsystem, Low-power ASIC design engineer
Qualcomm
Palo Alto,CA,