A leading technology company in San Francisco is looking for a Cellular ASIC Design Engineer to architect and implement protocol processing hardware for wireless SoCs. The candidate should have over 10 years of relevant experience and strong skills in SystemVerilog and Verilog. Responsibilities include hardware implementation, optimization of architectures, and debugging in the lab. The position offers a comprehensive compensation package with competitive base pay, stock options, and extensive employee benefits.#J-18808-Ljbffr