Dormont Manufacturing Co is seeking a Design For Test Engineer III to work on advanced DFT implementations for Networking chips. Candidates should have 5–7 years of experience with expertise in scan-insertion, ATPG, and verification tools.This full-time role based in San Jose, CA offers a competitive salary ranging from $95,900 to $170,500 annually and benefits like medical insurance, 401(k) matching, and tuition reimbursement.#J-18808-Ljbffr