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Embedded Engineer

Aptos,CA

345 Embedded Engineer jobs in Aptos,CA

New, Posted 16 hours ago
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Sr. Manufacturing Engineer- Automation

Super Micro Computer

San Jose, CA 95123

~ 46 min Onsite

  • BS/MS Manufacturing/Industrial Engineering preferred, 8+ years relevant work experience with storage component and system, server and hard drives industry preferred
  • Hands-on with PLC programming (Ladder Logic, Structured Text)
  • Experience with SCADA/HMI platforms (e.g., Wonderware, Ignition)
  • Familiarity with robotics, sensors, VFDs, and servo systems
  • Strong understanding of electrical controls, instrumentation, and pneumatics
  • Knowledge of network protocols (Modbus, OPC UA, Ethernet/IP)
  • Knowledge of Tools/Technologies: PLCs, SCADA, HMI, LabVIEW, Python, RSLogix, Ignition, OPC UA, PID control
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New Product Manufacturing Engineer

CACI International Inc

Los Gatos, CA 95032

~ 37 min Onsite

  • BA/BS degree in a technical discipline from an accredited college or university.
  • Minimum of five (5) years of experience as a manufacturing engineer or in a related role.
  • Must be a US person.
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Solutions Engineer

Viavi Solutions

San Jose, CA 95123

Paid Relocation to San Jose, CA

RemoteHealth InsurancePaid Time OffRetirement Benefit

  • Bachelor's degree from an accredited university in Engineering or related technical field (or equivalent work experience).
  • Minimum 5 years of experience in technical sales, business development, or pre-sales in the telecommunications, networking, or test and measurement industry.
  • Proven track record managing large strategic accounts, preferably Cisco or other major OEMs.
  • Strong background in networking, network security, and applications.
  • Hands-on experience with IP and Ethernet technologies : Data Center Ethernet, 1.6T/800/400/100/40/10GigEth, L4-L7 technologies, AI/ML, RoCEv2/CCL.
  • In-depth knowledge of routing protocols : IPv4/IPv6, RIP, BGP, OSPF, ISIS, RSVP-TE.
  • Familiarity with MPLS protocols : RSVP-TE, LDP.
  • Application-level protocol knowledge: HTTP(S), TCP/IP.
  • Experience with test platforms such as: TestCenter, CyberFlood, Viavi, Keysight/Ixia, BreakingPoint Systems (preferred).
  • Programming/scripting experience in Python (a plus).
  • Cisco certifications (CCNA, CCNP, CCIE) are highly desirable.
  • Pre-Sales Support & Customer Engagement
  • Partner with account teams to drive technical strategy and solution design for key accounts.
  • Provide direct pre-sales support to customers, tailoring product presentations and delivering technical demonstrations.
  • Understand customer business needs and translate them into consultative, value-driven solutions.
  • Lead proof-of-concept activities, ensuring successful technical evaluations.
  • Collaboration & Solution Development
  • Work with internal and external teams to anticipate, qualify, and respond to customer needs.
  • Serve as liaison between sales, product marketing, and engineering to communicate customer requirements and feature requests.
  • Provide post-sales technical support and ongoing customer training as required.
  • Collaborate with VIAVI Support and Engineering teams to resolve technical issues quickly and effectively.
  • Relationship Building
  • Build and maintain trusted technical relationships with strategic customers, particularly large accounts such as Cisco.
  • Develop long-term customer partnerships to support account growth and ongoing success.
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Sr. System RTL Designer/Architect

Advanced Micro Devices

San Jose, CA 95124

Hybrid~ 46 min

  • Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or related field
  • Senior-level System RTL designer with a strong background or passion for IP architecture
  • Define IP features and capabilities; own architecture and micro-architecture requirements
  • Drive technical specifications for IP blocks and provide direction to execution teams
  • Align and optimize hardware (silicon), firmware, and feature enablement for performance and power
  • Collaborate cross-functionally to identify risks and resolve architecture-level issues
  • Own architecture analysis and support feature-change requests from marketing/business teams
  • Partner with design teams on area/floorplan refinement, timing targets, verification test plans, and pre-silicon debug/performance sign-off
  • Support post-silicon teams for performance tuning, power optimization, and issue debug
  • This role is not eligible for visa sponsorship
  • LI-LC3
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Micro-architect/Logic Designer, Coherent Interconnect

Samsung Electronics Co.

San Jose, CA 95123

~ 46 min OnsiteEducation AssistanceHealth InsurancePaid Time OffRetirement Benefit

  • 10+ years of experience with a Bachelor's degree in Computer Science/Computer Engineering/relevant technical field, or 8+ years of experience with a Master's degree, or 6+ years of experience with a PhD
  • Strong background owning and driving the RTL design of various sub-blocks of the coherent interconnect or memory controller or LLC for the high performance digital designs
  • Demonstrated successful architectural through RTL design experience on high performance digital designs
  • Verilog expertise is required as is a deep understanding of ASIC design flow including RTL design, verification, logic synthesis, prototyping, DFT, timing analysis, floor-planning, ECO, bring-up & lab debug.
  • Knowledge of system caches and directory snoop filter protocols.
  • Familiarity with different on-chip network topologies: mesh, ring, crossbar.
  • Experience in leading and mentoring a team of engineers.
  • Knowledge of in Arm AMBA5 CHI, AMBA4 ACE or AXI coherent interconnect and bus protocols
  • Knowledge of memory subsystem design including coherent cache design.
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High Speed Analog I/O designer

Broadcom

San Jose, CA 95123

~ 46 min OnsiteHealth InsurancePaid Time OffRetirement Benefit

  • Master's or Ph.D. in Electrical Engineering, Electronics Engineering, or a related field
  • At least 10 years of experience in analog design, with a focus on high-speed RX and Analog-Front-End design
  • Experience with FinFET technologies
  • Expertise in high-speed DDR I/O interface, chip-chip interface design and optimization
  • Strong knowledge of analog receiver circuits such as CTLE, DFE, FEE
  • Knowledge of transmitter circuits such as FIR filter, slew rate control, voltage and current mode drivers
  • Knowledge of design for reliability ( EM, IR, aging, self-heating ) and layout effects (matching, reliability, proximity effects etc.)
  • Familiarity with custom digital design (i.e. high-speed logic paths, Serializer, De-serializer)
  • Proficiency with analog design tools (e.g., Cadence Virtuoso, Maestro, Spectre, HSPICE) and simulation techniques
  • Understanding of signal integrity, timing analysis and power management
  • Problem-Solving: Strong analytical and problem-solving skills, with the ability to resolve complex design challenges
  • Communication: Excellent verbal and written communication skills, with the ability to clearly convey technical information to stakeholders
  • Teamwork: Ability to work effectively within a cross-functional team and manage multiple priorities
  • Familiarity with industry standards and protocols related to DDR I/O, chiplet I/O and RX design
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iHire
Construction Project Engineer

Pts Data Center Solutions

Livermore, CA 94550

$90,000-$105,000/yr
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Environmental Science Officer

United States Army

Salinas, CA 93905

iHire
Superintendent

Construction Management & Development

Milpitas, CA 95035

$100,000-$125,000/yr
New, Posted 12 hours ago
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Head of NAM Customer Collaboration and Supply Chain Partnerships

Disability Solutions

San Jose, CA 95110

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