8+ years of hands-on experience in x86 architecture and storage-related hardware development, validation, and qualification.
B.S. in Electrical Engineering or Computer Engineering
Deep expertise in x86 system architecture
CPU subsystems (DDR5, chipsets, BMC, ETH LOM, peripherals)
Subcomponent selection (NVMe drives, AC/DC power supplies, discrete power circuits).
Solid understanding of high-speed and control buses, including PCIe, UPI, SAS/SATA, and serial protocols (I²C, I³C, SPI, SVID).
Experience with high-speed Ethernet technologies (1GbE to 400GbE).
Hands-on capability reviewing high-speed signals using oscilloscopes and bus analyzers (trace capture and signal analysis).
Expertise in analyzing device- and system-level power regulators, PWM selection/design, cooling dynamics, and electrical signal integrity (SI).
Foundational knowledge of Verilog and CPLD design.
Strong proficiency in scripting languages (e.g., Python, Bash) for hardware qualification test development and automation.
Experience configuring and running stress/qualification workloads using industry-standard tools (e.g., PTAT, Mprime, Iometer, Linpack, StressAppTest, SHC).
Familiarity with leveraging AI tools (e.g., Claude, Gemini) to accelerate design checks, test script development, and diagnostic dashboards.