Experience with development of the Xilinx Versal SOC including Programmable Logic, AIE Cores, and ARM Core processors
Experience with design, verification and analysis design tools such as Vivado, Vitis, Synopsis, Questasim, linters and CDC
Experience Implementing DSP communication Algorithms, commercial Security Algorithms, and/or Networking Algorithms.
Experience implementing very High Speed SERDES protocols such as 10G/25G Ethernet, JESD204C, and Aurora
Experience with Channelizing, Beamforming and MIMO systems.
Experience with implementing memory storage systems.
Able to write scripts in MATLAB, python, TCL or other scripting languages.
Experience in space system development.
Space enthusiast.