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Systems Architect Engineering

Fremont,CA

2200 Systems Architect Engineering jobs in Fremont,CA

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Amazon.com Services LLC Logo

Amazon.com Services LLC - Santa Clara, CA

Senior Software Development Engineer, EC2 Nitro
~ 26 min OnsiteHealth InsurancePaid Time OffRetirement Benefit
Recommended
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Micro-architect/Logic Designer, Coherent Interconnect

Samsung Electronics Co.

San Jose, CA 95123

Paid Relocation to San Jose, CA

Urgently HiringEducation AssistanceHealth InsurancePaid Time OffRetirement Benefit

The base pay range for this role is between $151,000 and $251,800.
Eligible for MBO bonus compensation, based on company, division, and individual performance.
Might be eligible to participate in long term incentive plan
Medical, dental, vision, life insurance, 401(k), free onsite lunch, employee purchase program, tuition assistance (after 6 months), paid time off, student loan program, wellness incentives, and many more.
Relocation
6+ years of experience with a Bachelor's degree in Computer Science/Computer Engineering/relevant technical field, or 4+ years of experience with a Master's degree, or 2+ years of experience with a PhD
Strong background owning and driving the RTL design of various sub-blocks of the coherent interconnect or memory controller or LLC for the high performance digital designs
Demonstrated successful architectural through RTL design experience on high performance digital designs
Verilog expertise is required as is a deep understanding of ASIC design flow including RTL design, verification, logic synthesis, prototyping, DFT, timing analysis, floor-planning, ECO, bring-up & lab debug.
Knowledge of system caches and directory snoop filter protocols.
Familiarity with different on-chip network topologies: mesh, ring, crossbar.
Experience in leading and mentoring a team of engineers.
Knowledge of in Arm AMBA5 CHI, AMBA4 ACE or AXI coherent interconnect and bus protocols
Knowledge of memory subsystem design including coherent cache design.
Applicants must be authorized to access such information or eligible for government authorization.
Knowledge of Verilog/VHDL, scripting, STA, DFT, ECO flows.
Proficient in AMBA, ACE, AXI, CHI protocols.
Knowledge of coherent interconnect, memory controller, and/or cache design.
Knowledge of memory subsystem, coherency, directory snoop filter protocols.
Familiarity with different on-chip network topologies: mesh, ring, crossbar.
Experience with a scripting language like Perl or Python.
New, Posted 9 hours ago
Easy Apply
Principal Hardware Systems Engineer

Everpure

Santa Clara, CA 95050

~ 26 min OnsiteUrgently Hiring

The annual base salary range is: $217,000—$326,000 USD
This role may be eligible for incentive pay and/or equity.
Flexible time off
Wellness resources
Company-sponsored team events
Deep architectural expertise in high-density x86 enterprise server systems, rack-scale power delivery topologies (power-tree modeling, transient analysis), dynamic thermal management, high-performance storage protocols (NVMe-oF, CXL), and multi-node rack architectures.
Extensive experience executing complex system bring-ups, high-speed signal integrity validation (PCIe Gen 5/6, high-frequency buses), and deep-dive hardware failure analysis using advanced lab instruments and telemetry architectures (BMC, Redfish, IPMI, PCIe analyzers, SMART logs).
Proven success building scalable, programmatic validation pipelines (Python/Shell) and rigorous system stress testing methodologies to qualify enterprise-grade L10/L11 infrastructure.
Demonstrated expertise in setting up, validating, and debugging rack-level interconnectivity spanning servers, high-speed switches, active optics, and fabric topologies.
Familiarity with leaf-spine networks, RoCE, RDMA, InfiniBand, and BGP is highly desirable.
This role requires an in-office presence at our **Santa Clara, CA** headquarters
Familiarity with leaf-spine networks, RoCE, RDMA, InfiniBand, and BGP is highly desirable.
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Sr. System RTL Designer/Serdes Architect

Advanced Micro Devices

San Jose, CA 95124

~ 28 min Onsite

Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or related field
Deep expertise in systems and IP architecture with a focus on SerDes, fabrics, memory subsystems, I/O, clocking, or security
Experience analyzing CPU/GPU/system-level performance bottlenecks and workloads
Knowledge of power management, low power microarchitecture, and design methodologies
New, Posted 22 hours ago
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Software Development Engineer, AI/ML, AWS Neuron, Model Inference

Annapurna Labs (U.S.)

Cupertino, CA 95014

~ 32 min OnsiteUrgently HiringHealth InsurancePaid Time OffRetirement Benefit

Your Amazon package will include sign-on payments and restricted stock units (RSUs).
USA, CA, Cupertino - 165,200.00 - 223,600.00 USD annually
Health insurance (medical, dental, vision, prescription, Basic Life & AD&D; insurance and option for Supplemental life plans, EAP, Mental Health Support, Medical Advice Line, Flexible Spending Accounts, Adoption and Surrogacy Reimbursement coverage), 401(k) matching, paid time off, and parental leave.
An environment that celebrates knowledge-sharing and mentorship.
Our senior members enjoy one-on-one mentoring and thorough, but kind, code reviews.
Experience optimizing inference performance for both latency and throughput on such large models across the stack from system level optimizations through to Pytorch or JAX is a must have.
Bachelor's degree in computer science or equivalent
3+ years of non-internship professional software development experience
3+ years of non-internship design or architecture (design patterns, reliability and scaling) of new and existing systems experience
Fundamentals of Machine learning and LLMs, their architecture, training and inference lifecycles along with work experience on some optimizations for improving the model execution.
Software development experience in C++, Python (experience in at least one language is required).
Strong understanding of system performance, memory management, and parallel computing principles.
Proficiency in debugging, profiling, and implementing best software engineering practices in large-scale systems.
Familiarity with PyTorch, JIT compilation, and AOT tracing.
Familiarity with CUDA kernels or equivalent ML or low-level kernels
Candidates with performant kernel development such as CUTLASS, FlashInfer etc., would be well suited.
Familiar with syntax and tile-level semantics similar to Triton.
Experience with online/offline inference serving with vLLM, SGLang, TensorRT or similar platforms in production environments.
Deep understanding of computer architecture, operation systems level software and working knowledge of parallel computing.
Recommended
Associate Solution Architect with Modernization Experience

Deloitte

San Jose, CA 95115

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Systems Engineer Level 4

Northrop Grumman

Sunnyvale, CA 94087

Paid Relocation to Sunnyvale, CA

~ 27 min OnsiteHealth InsurancePaid Time Off

Primary Level Salary Range: $142,200.00 - $213,400.00
Employees may be eligible for overtime, shift differential, and a discretionary bonus in addition to base pay.
Annual bonuses are designed to reward individual contributions as well as allow employees to share in company results.
Employees in Vice President or Director positions may be eligible for Long Term Incentives.
Relocation assistance may be available
Health insurance coverage, life and disability insurance, savings plan, Company paid holidays and paid time off (PTO) for vacation and/or personal business.
TRAVEL: Yes, 10% of the Time
This position is full time onsite at Sunnyvale, CA campus.
Bachelor's Degree in a STEM (Science, Technology, Engineering or Math) discipline with 8 years relevant experience; or Master's Degree in a STEM (Science, Technology, Engineering or Math) with 6 years relevant experience or PhD in a STEM with 4 years relevant experience.
Ability to read and interpret technical drawings.
First-hand experience with requirements and interface management .
Familiarity with system drawings and documents such as Interface Control Documents, System/Subsystem Specifications, Verification Cross Reference Matrices (VCRM), etc.
Experience with system engineering tools such as IBM Rational DOORS.
Familiarity with MBE/MBSE concepts and tools.
US Citizenship required.
Ability to obtain and maintain Secret Security Clearance
Bachelor's Degree in Mechanical, Electrical or Aerospace Engineering
Hands on Project Management experience.
Understanding and knowledge of Agile (SCRUM) techniques and activities
First hand experience with MBSE concepts and tools (MagicDraw and / or Cameo preferred).
Design and operational knowledge of navy programs.
Ability to read and interpret government or military specifications.
Experience with proposals.
Recommended
Engineering Systems - Dassault 3DExperience Solution Architect

Accenture

Mountain View, CA 94039

Recommended
Staff Software Engineer, Drivers and Systems Engineering

Google

Sunnyvale, CA 94086

Recommended
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Technical Staff, Platform Architect

Dell

Santa Clara, CA 95050

~ 26 min Onsite

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Software Engineer Manager, Embedded Systems/Firmware

Google

Sunnyvale, CA 94086

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