1462 Supplier Quality Engineer Intermediate jobs in Menlo Park,CA

A range in US-California of --$185,000 - $215,000

An annual corporate bonus

A long-term incentive bonus

Premium health coverage

A 401(k) with generous matching

Resources for financial planning and goal setting

Ample paid time off

Parental leave

Comprehensive life and disability protection

Master's degree or Ph.D. in Computer Science, Computer Engineering, Robotics, Electrical Engineering, or a related technical field (or equivalent practical experience).

5+ years of progressive engineering experience in software development, data analytics infrastructure, or automated testing for autonomous vehicles, robotics, or complex distributed systems.

2+ years of experience leading technical architecture, setting engineering strategy, or guiding technical direction across multiple engineering teams.

Expert proficiency in Python and C++, with demonstrated experience building production-grade data pipelines, distributed execution frameworks, or testing infrastructure.

Hands-on experience working with big data structures, robotics logging formats (e.g., ROS/ROS2, MCAP, Protobuf, CAN logs), and cloud data storage.

Employment is contingent upon the successful completion of a drug screen and background check. Candidates who have been offered the position must pass both screenings before their start date.

Demonstrated experience applying LLMs/VLMs, sequence modeling, pattern recognition, or vector embeddings to log classification, failure mode retrieval, or automated root cause analysis.

In-depth understanding of autonomous driving software architectures (perception, sensor fusion, localization, motion planning, vehicle control).

Experience operating within SiL, HiL, or cloud-based replay and simulation testing setups at scale.

Experience with distributed frameworks and data tools such as PySpark, Ray, Databricks/Snowflake, Vector DBs, Apache Airflow, Kubernetes, and AWS/GCP services.

Competitive financial compensation, including various compensation plans

Solid benefits package

Medical, Dental, Vision Insurance

401k, With Matching Contributions

Short-Term/Long-Term Disability Insurance

Health Savings Account (HSA)/Health Reimbursement Account (HRA) Options

Paid Time Off

Tuition Reimbursement

Growth Opportunities

Full time

At-least **6+ years of experience** in **System Verilog HVL and C++/C**

At-least 6+ year of experience in **UVM.**

Experience in complete verification cycle which includes development of test plan, BFM/Driver/Monitor/Scoreboard component development and integration in test bench, stress/corner testing, failure debug, gate level simulations, assertions, and coverage closure.

Proficient in **SVTB/UVM, C++ testbench**

**Proficient in debug** and assertions coding

**Make/Perl/Python / any script**

**Any protocol experiace is fine**

Understand DSP is a plus

Subversion for Repository and Bugzilla is also a Plus

The annual base salary range is: $217,000—$326,000 USD

This role may be eligible for incentive pay and/or equity.

Flexible time off

Wellness resources

Company-sponsored team events

Deep architectural expertise in high-density x86 enterprise server systems, rack-scale power delivery topologies (power-tree modeling, transient analysis), dynamic thermal management, high-performance storage protocols (NVMe-oF, CXL), and multi-node rack architectures.

Extensive experience executing complex system bring-ups, high-speed signal integrity validation (PCIe Gen 5/6, high-frequency buses), and deep-dive hardware failure analysis using advanced lab instruments and telemetry architectures (BMC, Redfish, IPMI, PCIe analyzers, SMART logs).

Proven success building scalable, programmatic validation pipelines (Python/Shell) and rigorous system stress testing methodologies to qualify enterprise-grade L10/L11 infrastructure.

Demonstrated expertise in setting up, validating, and debugging rack-level interconnectivity spanning servers, high-speed switches, active optics, and fabric topologies.

Familiarity with leaf-spine networks, RoCE, RDMA, InfiniBand, and BGP is highly desirable.

This role requires an in-office presence at our **Santa Clara, CA** headquarters

Familiarity with leaf-spine networks, RoCE, RDMA, InfiniBand, and BGP is highly desirable.