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Python

Mountain View,CA

945 Python jobs in Mountain View,CA

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U.S. Army Reserve Logo

U.S. Army Reserve - Oakland, CA

88H Cargo Specialist - Find Success in US Army

Paid Relocation to Oakland, CA

~ 49 min OnsiteEducation AssistanceHealth InsurancePaid Time Off
New, Posted 1 day ago
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Confluent - Staff Software Engineer - Stream Processing & Analytics

IBM

San Jose, CA 95123

~ 22 min OnsiteHealth InsurancePaid Time OffRetirement Benefit

Opportunities for performance based salary incentive programs
The salary will vary depending on your job-related skills, experience and location.
Healthcare benefits including medical & prescription drug coverage, dental, vision, and mental health & well being
Financial programs such as 401(k), cash balance pension plan, the IBM Employee Stock Purchase Plan, financial counseling, life insurance, short & long- term disability coverage
Generous paid time off including 12 holidays, minimum 56 hours sick time, 120 hours vacation, 12 weeks parental bonding leave in accordance with IBM Policy, and other Paid Care Leave programs
IBM also offers paid family leave benefits to eligible employees where required by applicable law
Training and educational resources on our personalized, AI-driven learning platform where IBMers can grow skills and obtain industry-recognized certifications to achieve their career goals
Diverse and inclusive employee resource groups, giving & volunteer opportunities, and discounts on retail products, services & experiences
Participate in on-call for the services your team owns
10+ years of significant experience designing, building, and operating distributed systems or cloud-native backend infrastructure in production
.Strong working knowledge of Kubernetes and distributed-systems patterns (control loops, API servers, high-scale control planes), plus the fundamentals — containerization, networking, resource isolation.
Proficiency in at least one of Go, Java, or Python, and the willingness to work across all three.
A track record of leading cross-team technical work: turning ambiguous requirements into designs others can rally behind.
You must have the ability to work without a need for current or future visa sponsorship.
Exposure to model serving, LLM/agent infrastructure, or streaming data systems.
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Engineer III - Platform Data Engineer (Remote)

CrowdStrike

Sunnyvale, CA 94086

$120,000-$180,000/yr
Remote
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Physical Design Engineer - Static Timing Analysis, Annapurna Labs, Cloud Scale Machine Learning

Annapurna Labs (U.S.)

Cupertino, CA 95014

~ 13 min OnsiteHealth InsurancePaid Time OffRetirement Benefit

Sign-on payments
Restricted stock units (RSUs)
USA, CA, Cupertino - 176,600.00 - 247,300.00 USD annually
USA, TX, Austin - 153,600.00 - 215,000.00 USD annually
Health insurance (medical, dental, vision, prescription, Basic Life & AD&D; insurance and option for Supplemental life plans, EAP, Mental Health Support, Medical Advice Line, Flexible Spending Accounts, Adoption and Surrogacy Reimbursement coverage)
401(k) matching
Paid time off
Parental leave
Experience scripting or coding
BS + 6yrs or MS + 4yrs or PhD + 2yr in EE/CS
Expertise in timing analysis fundamentals
1+ years doing Static Timing Analysis
1+ years with timing constraint development
Timing Analysis using EDA tools (examples: PrimeTime, Tempus, or others)
Understanding of ASIC Physical Design from RTL-to-GDSII
Understanding of other sign-off activities (ir/em, physical verification, DFT)
1+ years of scripting experience with Tcl, Perl or Python
Expertise developing flows using STA tools (examples: PrimeTime, Tempus or others)
Expertise in ECO flows (examples: PT-DMSA, Tempus-ECO, Tweaker or others)
Experience in advanced nodes - 16nm or below
Expertise in parasitic extraction tools (examples: STAR-RC, Quantus or others)
Expertise on circuit level analysis using tools like SPICE / SPECTRE
Experience with timing of IO interfaces like DDR, HBM, PCIe, Die-to-Die etc.
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Design Verification Engineer (Einfochips)

Arrow Electronics

San Jose, CA 95134

~ 22 min OnsiteEducation AssistanceHealth InsurancePaid Time OffRetirement Benefit

Competitive financial compensation, including various compensation plans
Solid benefits package
Medical, Dental, Vision Insurance
401k, With Matching Contributions
Short-Term/Long-Term Disability Insurance
Health Savings Account (HSA)/Health Reimbursement Account (HRA) Options
Paid Time Off
Tuition Reimbursement
Growth Opportunities
Full time
At-least **6+ years of experience** in **System Verilog HVL and C++/C**
At-least 6+ year of experience in **UVM.**
Experience in complete verification cycle which includes development of test plan, BFM/Driver/Monitor/Scoreboard component development and integration in test bench, stress/corner testing, failure debug, gate level simulations, assertions, and coverage closure.
Proficient in **SVTB/UVM, C++ testbench**
**Proficient in debug** and assertions coding
**Make/Perl/Python / any script**
**Any protocol experiace is fine**
Understand DSP is a plus
Subversion for Repository and Bugzilla is also a Plus
New, Posted 12 hours ago
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LinkedIn
Senior Software Engineer, Python & API Integration

Vanterra Foundation Solutions

Mountain View, CA

iHire
Mechanical Technician

Micro Lithography

Sunnyvale, CA 94089

$33.50/hr
New, Posted 1 day ago
Easy Apply
Hardware Lead Engineer, Hyperscale Line of Business

Everpure

Santa Clara, CA 95050

~ 17 min Onsite

This role may be eligible for incentive pay and/or equity.
$217,000—$326,000 USD
Flexible time off
Wellness resources
Company-sponsored team events
Advanced technical mastery in x86 architectures, enterprise storage systems, subcomponent selection (NVMe, power supplies, PWM design), and high-speed bus interfaces (PCIe, SAS/SATA, UPI, I2C/I3C, SPI).
Proven ability to design, automate, and execute hardware qualification frameworks using scripting languages (such as Python or BASH) alongside industry-standard stress and diagnostic tools.
Hands-on proficiency analyzing device- and system-level power regulators, cooling, and high-speed signal integrity utilizing oscilloscopes and protocol analyzers.
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LinkedIn
Software Engineer

Harnham

Mountain View, CA

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Sr. C++ Developer

Imagry

San Jose, CA 95192

~ 22 min Onsite

5+ years modern C++ (C++17/20), STL / templates, multithreading / synchronization
Development of Realtime systems involving both SW & HW
2+ years of Python development
Strong Low-Level Programming and Debugging tools
Software development practices: Git, code reviews, unit tests
Experience in implementing Real-time Algorithms
B.Sc / B.A - Computer Science or other relevant university degree
C++ Development and Optimization Tools
CUDA or OpenCL for GPU acceleration
Python for tooling, tests, and bindings (pybind11)
Experience with image processing

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CPU Formal Verification Engineer

Qualcomm

Santa Clara, CA 95053

~ 17 min Onsite

$147,900.00 - $221,900.00
Competitive annual discretionary bonus program
Opportunity for annual RSU grants
Our highly competitive benefits package is designed to support your success at work, at home, and at play.
BA/BS degree in CS/EE with 8+ years of practical experience in application of formal methods in hardware or software
Strong model checking or theorem proving background/experience in verification of complex systems
Experience in writing assertions and associated modeling code in Hardware Description Languages or in proving correctness of architectural specifications using formal methods
Working familiarity with model checkers like Jaspergold and VC-Formal or theorem-proving tools such as ACL2 and HOL
Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field and 2+ years of Hardware Engineering, Software Engineering, Electrical Engineering, Systems Engineering, or related work experience. OR Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field and 1+ year of Hardware Engineering, Software Engineering, Electrical Engineering, Systems Engineering, or related work experience. OR PhD in Electrical Engineering, Computer Engineering, Computer Science, or related field.
MS/PhD degree in CS/EE; 4+ years of practical experience
Strong foundation in formal methods and in their application to hardware specifications and/or implementations
Domain knowledge in one or more of these areas: Microprocessor architecture and micro-architecture, instruction set architecture, floating-point math, memory consistency, memory coherency, security architectures
Strong software engineering skills with proven ability in automation and proficiency in at least one programming language (C++, Python, TCL etc.)
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