657 Modeling And Simulation jobs in Pflugerville, TX
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Airtasker

Austin, TX

~ 24 min OnsiteUrgently HiringFlexible Schedule

  • Age 18 or older
  • Own an iPhone or Android smartphone
  • Have the tools and skills for accepted jobs
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Design System Designer

Emerson

Austin, TX

US Work Authorized

Bachelor's Degree

Within 15 miles of Austin, TX

Hybrid~ 24 minEducation AssistanceHealth InsurancePaid Time OffRetirement Benefit

  • Bachelor's degree and 5 years of related experience; or a Master's degree and 3 years of relevant experience; or a PhD without experience; or equivalent work experience
  • Legal authorization to work in the United States - Sponsorship will not be provided for this position
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Mechanical Designer

Insight Global

Austin, TX

$40-$58/hr
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Sr. Coherent Interconnect Micro-architect/Logic Designer

Samsung Electronics Co.

Austin, TX

Bachelor's Degree

Within 15 miles of Austin, TX

~ 24 min OnsiteEducation AssistanceHealth InsurancePaid Time OffRetirement Benefit

  • Knowledge of in Arm AMBA5 CHI, AMBA4 ACE or AXI coherent interconnect and bus protocols
  • Familiarity with different on-chip network topologies: mesh, ring, crossbar
  • 15+ years of experience with a Bachelor's degree in Computer Science/Computer Engineering/relevant technical field, or 13+ years of experience with a Master's degree, or 11+ years of experience with a PhD
  • Verilog expertise is required as is a deep understanding of ASIC design flow including RTL design, verification, logic synthesis, prototyping, DFT, timing analysis, floor-planning, ECO, bring-up & lab debug
  • Knowledge of system caches and directory snoop filter protocols
  • Strong background owning and driving the RTL design of various sub-blocks of the coherent interconnect or memory controller or LLC for the high performance digital designs
  • Demonstrated experience of successful Architectural through RTL design experience on high performance digital designs
  • Experience in leading and mentoring a team of engineers
  • Knowledge of memory subsystem design including coherent cache design
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