• Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field and 4+ years of Hardware Engineering, Software Engineering, Electrical Engineering, Systems Engineering, or related work experience.
OR
Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field and 3+ years of Hardware Engineering, Software Engineering, Electrical Engineering, Systems Engineering, or related work experience.
OR
PhD in Electrical Engineering, Computer Engineering, Computer Science, or related field and 2+ years of Hardware Engineering, Software Engineering, Electrical Engineering, Systems Engineering, or related work experience.
BS degree in Electrical or Computer Engineering with 3 - 8 years of CPU RTL power modeling and estimation experience.
Deep understanding of CPU or ASIC low power design including expertise in active and Idle power optimization, RTL clock gating techniques, CPU power modeling and analysis for power/performance tradeoffs and battery life projections
Working knowledge of Verilog and/or VHDL with hands-on experience in low-power simulation tools such as PowerArtist and PTPX.
Knowledge of logic design principles along with power and timing implications.