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Computer System Analyst

Santa Clara,CA

1295 Computer System Analyst jobs in Santa Clara,CA

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U.S. Army Reserve Logo

U.S. Army Reserve - Oakland, CA

Warehouse Logistics Specialist - Full Healthcare + Housing Allowance

Paid Relocation to Oakland, CA

~ 51 min OnsiteEducation AssistanceHealth InsurancePaid Time Off
New, Posted 1 day ago
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Physical Design Engineer - Static Timing Analysis, Annapurna Labs, Cloud Scale Machine Learning

Annapurna Labs (U.S.)

Cupertino, CA 95014

~ 15 min OnsiteUrgently HiringHealth InsurancePaid Time OffRetirement Benefit

Sign-on payments
Restricted stock units (RSUs)
USA, CA, Cupertino - 176,600.00 - 247,300.00 USD annually
USA, TX, Austin - 153,600.00 - 215,000.00 USD annually
Health insurance (medical, dental, vision, prescription, Basic Life & AD&D; insurance and option for Supplemental life plans, EAP, Mental Health Support, Medical Advice Line, Flexible Spending Accounts, Adoption and Surrogacy Reimbursement coverage)
401(k) matching
Paid time off
Parental leave
Experience scripting or coding
BS + 6yrs or MS + 4yrs or PhD + 2yr in EE/CS
Expertise in timing analysis fundamentals
1+ years doing Static Timing Analysis
1+ years with timing constraint development
Timing Analysis using EDA tools (examples: PrimeTime, Tempus, or others)
Understanding of ASIC Physical Design from RTL-to-GDSII
Understanding of other sign-off activities (ir/em, physical verification, DFT)
1+ years of scripting experience with Tcl, Perl or Python
Expertise developing flows using STA tools (examples: PrimeTime, Tempus or others)
Expertise in ECO flows (examples: PT-DMSA, Tempus-ECO, Tweaker or others)
Experience in advanced nodes - 16nm or below
Expertise in parasitic extraction tools (examples: STAR-RC, Quantus or others)
Expertise on circuit level analysis using tools like SPICE / SPECTRE
Experience with timing of IO interfaces like DDR, HBM, PCIe, Die-to-Die etc.
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Aviation Electronics, Electrical & Computer Systems Technician

U.S. Navy

Santa Clara, CA 95051

New, Posted 14 hours ago
Easy Apply
Principal Hardware Systems Engineer

Everpure

Santa Clara, CA 95050

OnsiteUrgently Hiring

The annual base salary range is: $217,000—$326,000 USD
This role may be eligible for incentive pay and/or equity.
Flexible time off
Wellness resources
Company-sponsored team events
Deep architectural expertise in high-density x86 enterprise server systems, rack-scale power delivery topologies (power-tree modeling, transient analysis), dynamic thermal management, high-performance storage protocols (NVMe-oF, CXL), and multi-node rack architectures.
Extensive experience executing complex system bring-ups, high-speed signal integrity validation (PCIe Gen 5/6, high-frequency buses), and deep-dive hardware failure analysis using advanced lab instruments and telemetry architectures (BMC, Redfish, IPMI, PCIe analyzers, SMART logs).
Proven success building scalable, programmatic validation pipelines (Python/Shell) and rigorous system stress testing methodologies to qualify enterprise-grade L10/L11 infrastructure.
Demonstrated expertise in setting up, validating, and debugging rack-level interconnectivity spanning servers, high-speed switches, active optics, and fabric topologies.
Familiarity with leaf-spine networks, RoCE, RDMA, InfiniBand, and BGP is highly desirable.
This role requires an in-office presence at our **Santa Clara, CA** headquarters
Familiarity with leaf-spine networks, RoCE, RDMA, InfiniBand, and BGP is highly desirable.
Recommended
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Digital Environment / Integrations Engineer 2/3

Northrop Grumman

Sunnyvale, CA 94087

Paid Relocation to Sunnyvale, CA

~ 14 min OnsiteHealth InsurancePaid Time Off

Primary Level Salary Range: $101,000.00 - $151,400.00
Secondary Level Salary Range: $125,300.00 - $187,900.00
Employees may be eligible for overtime, shift differential, and a discretionary bonus in addition to base pay
Annual bonuses are designed to reward individual contributions as well as allow employees to share in company results.
Employees in Vice President or Director positions may be eligible for Long Term Incentives.
Relocation assistance may be available
Health insurance coverage, life and disability insurance, savings plan, Company paid holidays and paid time off (PTO) for vacation and/or personal business.
This position is full-time onsite in Sunnyvale, CA.
Bachelor's Degree in Computer Science, Information Systems, Data Engineering / Data Science, or similar STEM related discipline with 2 years relevant experience; or Master's Degree in Computer Science, Information Systems, Data Engineering / Data Science, or similar STEM related discipline with 0 years relevant work experience
Experience with data architecture, data models, physical database designs, data integration strategy and design for enterprise systems and/or across multiple platforms
Experience with Data Analytics and Data Visualization Tools (e.g Tableau, Power BI) as well as SQL
Experience with basic programming languages (e.g Python, Java or C#)
Familiarity with API protocols (REST, GraphQL, or SOAP) and JSON/XML data formats
Familiarity with Project Lifecycle Management (PLM) tools, processes and integrations (e.g Teamcenter, ENOVIA, Windchill)
Familiarity with configuration management / change management processes and tools
Must be a US citizen
Must be able to obtain and maintain a US Government Secret Clearance
Bachelor's Degree in Computer Science, Information Systems, Data Engineering / Data Science, or similar STEM related discipline with 5 years relevant experience; or Master's Degree in Computer Science, Information Systems, Data Engineering / Data Science, or similar STEM related discipline with 3 years relevant work experience
Must be a US citizen with the ability to obtain a DOD secret clearance
Demonstrated experience in program adoption of digital engineering concepts, methods, and processes including digital thread implementation
Understanding and knowledge of Agile methodologies techniques and activities, including Agile project management tools, (e.g Jira / Atlassian Suite)
Demonstrated experience building secure APIs and familiarity with integration platforms (e.g Azure)
Demonstrated experience in data architecture, enterprise data modeling, and data platform engineering across multiple domains
Demonstrated experience with Project Lifecycle Management and tools (Teamcenter preferred) during design and development phase. Familiarity with manufacturing and sustainment phases are a plus
Familiarity with system modeling languages, approaches, and methodologies, such as SysML as well as MBSE tools (e.g Cameo, IBM Rhapsody)
Familiarity with ERP/SAP integration patterns, MES/PLM/ERP data domains, and cross system data harmonization
Familiarity with managing data and tool integration across classified and disconnected environments
Familiarity with Northrop Grumman Enterprise and/or Sector standards and tools for data strategy and architecture
Recommended
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Manufacturing Engineer

Super Micro Computer

San Jose, CA 95123

~ 16 min OnsiteUrgently Hiring

$83,000 - $100,000
Participation in bonus and equity award programs
Comprehensive benefits package
Standard working hours as determined by the company.
1-2 years of practical working experience within the electronics industry.
Proficient in using laboratory diagnostic tools, specifically oscilloscopes and multimeters, to perform comprehensive hardware failure analysis.
Strong ability to read and interpret schematic diagrams, alongside a solid understanding of fundamental electronic design principles.
Solid understanding of computer and server architectures, combined with the ability to use Linux command-line tools for system-level and board-level failure detection/analysis.
Practical knowledge of the PCBA manufacturing process, including hands-on capability to perform basic component-level soldering
Bachelor's degree or higher in Electrical Engineering, Electronics Engineering, or a related technical discipline preferred
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Micro-architect/Logic Designer, Coherent Interconnect

Samsung Electronics Co.

San Jose, CA 95123

Paid Relocation to San Jose, CA

Education AssistanceHealth InsurancePaid Time OffRetirement Benefit

The base pay range for this role is between $151,000 and $251,800.
Eligible for MBO bonus compensation, based on company, division, and individual performance.
Might be eligible to participate in long term incentive plan
Medical, dental, vision, life insurance, 401(k), free onsite lunch, employee purchase program, tuition assistance (after 6 months), paid time off, student loan program, wellness incentives, and many more.
Relocation
6+ years of experience with a Bachelor's degree in Computer Science/Computer Engineering/relevant technical field, or 4+ years of experience with a Master's degree, or 2+ years of experience with a PhD
Strong background owning and driving the RTL design of various sub-blocks of the coherent interconnect or memory controller or LLC for the high performance digital designs
Demonstrated successful architectural through RTL design experience on high performance digital designs
Verilog expertise is required as is a deep understanding of ASIC design flow including RTL design, verification, logic synthesis, prototyping, DFT, timing analysis, floor-planning, ECO, bring-up & lab debug.
Knowledge of system caches and directory snoop filter protocols.
Familiarity with different on-chip network topologies: mesh, ring, crossbar.
Experience in leading and mentoring a team of engineers.
Knowledge of in Arm AMBA5 CHI, AMBA4 ACE or AXI coherent interconnect and bus protocols
Knowledge of memory subsystem design including coherent cache design.
Applicants must be authorized to access such information or eligible for government authorization.
Knowledge of Verilog/VHDL, scripting, STA, DFT, ECO flows.
Proficient in AMBA, ACE, AXI, CHI protocols.
Knowledge of coherent interconnect, memory controller, and/or cache design.
Knowledge of memory subsystem, coherency, directory snoop filter protocols.
Familiarity with different on-chip network topologies: mesh, ring, crossbar.
Experience with a scripting language like Perl or Python.
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Sr. System RTL Designer/Serdes Architect

Advanced Micro Devices

San Jose, CA 95124

~ 16 min Onsite

Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or related field
Deep expertise in systems and IP architecture with a focus on SerDes, fabrics, memory subsystems, I/O, clocking, or security
Experience analyzing CPU/GPU/system-level performance bottlenecks and workloads
Knowledge of power management, low power microarchitecture, and design methodologies
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Systems Safety Engineer

Anduril Industries

Mountain View, CA 94040

~ 17 min OnsiteHealth Insurance

$160,000-$211,000 USD
Highly competitive equity grants are included in the majority of full time offers; and are considered part of Anduril's total compensation package.
Anduril offers top-tier benefits for full-time employees
Minimum of 5 years of industry experience as a System Safety Engineer or equivalent engineering background
B.S. degree in Mechanical Engineering, Aerospace Engineering, Systems Engineering, or equivalent technical discipline
Experience with safety-critical hardware and software systems in the defense or aerospace industry
Familiarity with MIL-STD-882E and other relevant safety standards
Strong background in safety analysis techniques including FTA, FHA, SCFTA, and FMECA
Experience with requirements decomposition for Safety
Failure investigation/analysis experience with a proven track record of solving problems and preventing reoccurrence
Design Review experience (PDR, CDR, MRR)
Eligibility to obtain and maintain a U.S. security clearance
By submitting your application, you consent to Anduril Industries using a third-party service provider to conduct pre-employment risk, integrity, and due diligence screening and assessing potential risks as part of your application process.
M.S. degree in Mechanical Engineering, Aerospace Engineering, Systems Engineering, or equivalent technical discipline
Experience or familiarity with ARP-4754, ARP-4761, MIL-STD-516C, and JSSSEH
Experience with Relyence, Teamcenter, JIRA, JAMA, Cameo, and/or Ansys
Software safety case development experience
Experience with risk management, change control/change management reviews, and software/firmware HITL/SITL
AI/ML software safety experience
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Manager, AV Planner Evaluation

General Motors

Sunnyvale, CA 94087

Paid Relocation to Sunnyvale, CA

Remote

The salary range for this role is ($218,800 - $335,300).
Bonus Potential: An incentive pay program offers payouts based on company performance, job level, and individual performance.
This Job may be eligible for relocation benefits.
Bachelor's, Master's, or PhD in Computer Science, Robotics, Engineering, Machine Learning, Data Science, or related
5+ years of experience in engineering analysis, ML evaluation, or autonomy analytics
3+ years of experience evaluating dynamic systems using numerical and/or ML approaches, including time-series data and state derivatives
3+ years of experience building and managing high-performing engineering teams
Strong proficiency developing Python in production team environments, including testing, performance, and code review
Comfort working with C++ codebases, including reading, debugging, and instrumenting core algorithms
Strong hands-on familiarity with data visualization libraries for large-scale analysis and reporting
Applicants in the recruitment process may be required, where applicable, to successfully complete a role-related assessment(s) and/or a pre-employment screening prior to beginning employment.
Solid understanding of vehicle dynamics
Expertise in Planning and Controls system design
Experience evaluating robotics or AV systems using sensor data such as camera, lidar, and radar, and working with large-scale time-series analysis.
Familiarity with statistical modeling, experimental design, and hypothesis testing for autonomy or simulation evaluation.
Proficiency in SQL and experience shaping logging, data schemas, and evaluation pipelines for large-scale autonomy testing and performance monitoring.
Experience with ROS or similar robotics/IPC frameworks, log pipelines, and experiment databases or evaluation platforms.
Prior experience with computational geometry, linear algebra, PyTorch, and ML techniques applied to perception, prediction, planning, or control.
Background contributing to release gating, risk assessment, and safety-related decisions for autonomy systems.
Experience using AI-assisted development and analytics tools to improve engineering productivity and evaluation coverage.
A background in robotics or the AV/ADAS industry

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Signal Integrity Engineer – DRAM Product Architecture for AI Systems

Micron Technology

San Jose, CA 95113

$177,000-$387,000/yr
~ 16 min OnsiteHealth InsurancePaid Time Off

$177,000.00 - $387,000.00 a year
Additional compensation may include benefits, bonuses and equity.
Medical, dental and vision plans
Benefit programs that help protect your income if you are unable to work due to illness or injury
Paid family leave
A robust paid time-off program
Paid holidays
Full-time position
Bachelor's degree in Electrical Engineering, Computer Engineering, or a related technical field
12+ years of experience in SI/PI modeling, analysis, and design guidance for high-speed digital systems
Strong expertise in signal integrity, power integrity, electromagnetics, transmission lines, channel analysis, I/O design, and power delivery networks
Hands-on experience with simulation tools such as Keysight ADS, Synopsys HSPICE, or similar circuit modeling environments
Demonstrated ability to translate complex electrical analysis into architecture recommendations and design tradeoffs
15+ years of experience in advanced SI/PI architecture, modeling, or power delivery network design
Expertise with high-speed interfaces such as DDR, LPDDR, HBM, PCIe, UCIe, SERDES, or related technologies
Experience with advanced EDA tools including ANSYS HFSS, SIwave, Cadence PowerSI, PowerDC, or equivalent solutions
Experience with DRAM modules, RCD-DRAM interfaces, or module-based memory architectures
Experience working with Agentic AI tools to assist with design and verification
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