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Santa Clara,CA

1449 Python Swe jobs in Santa Clara,CA

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U.S. Army Reserve Logo

U.S. Army Reserve - Oakland, CA

88H Cargo Specialist - Apply Today

Paid Relocation to Oakland, CA

~ 51 min OnsiteEducation AssistanceHealth InsurancePaid Time Off
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Infrastructure Engineer III, TechOps CICD Image Management (Remote)

CrowdStrike

Sunnyvale, CA 94086

$120,000-$180,000/yr
Remote
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LOGISTICS MANAGEMENT SPECIALIST

Naval Sea Systems Command

Santa Clara, CA

Onsite

The salary range for this position is capped at GS-15, step 05 which is currently equivalent to the following locations: Norfolk, VA: $170,164; Mechanicsburg, PA: $171,067; San Diego, CA: $191,535 & Washington Navy Yard, DC: $191,850.
NORFOLK, VA: $127,646 - $195,190
MECHANICSBURG, PA: $128,323 - $196,225
SAN DIEGO, CA: $143,677 - $197,200
WASHINGTON NAVY YARD, DC: $143,913 - $197,200
Certain incentives (such as Recruitment, Relocation or Student Loan Repayment) may be authorized to eligible selectees.
May offer recruitment incentives for new employees
Certain incentives (such as Recruitment, Relocation or Student Loan Repayment) may be authorized to eligible selectees.
May offer relocation expense reimbursement
Must be a US Citizen.
Must be determined suitable for federal employment.
Must participate in the direct deposit pay program.
New employees to the Department of the Navy will be required to successfully pass the E-Verify employment verification check.
Generally, current federal employees applying for GS jobs must serve at least one year at the next lower grade level. This requirement is called time-in-grade. Time-in-grade requirements must be met by the closing date of this announcement.
Within the Department of Defense (DoD), the appointment of retired military members within 180 days immediately following retirement date to a civilian position is subject to the provisions of 5 United States Code 3326.
Males born after 12-31-59 must be registered for Selective Service.
You will be required to obtain and maintain an interim and/or final SECRET security clearance prior to entrance on duty.
Certification in the Functional Area and Tier assigned to the position, along with Continuous Learning (CL) points, are required within established timeframes.
This position may require travel from normal duty station to CONUS and OCONUS and may include remote or isolated sites.
You must be able to travel on military and commercial aircraft for extended periods of time.
Your resume must demonstrate at least one year of specialized experience at or equivalent to the pay band NH-03 (GS-13 equivalent) in the Federal service or equivalent experience in the private or public sector. Specialized experience must demonstrate the following: leading complex data-driven analyses, metrics-based assessments, and advanced technology integrations to resolve critical lifecycle resource constraints, balance performance against costs, and deliver executive-level (Flag/SES) briefs.
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Principal Hardware Systems Engineer

Everpure

Santa Clara, CA 95050

Onsite

The annual base salary range is: $217,000—$326,000 USD
This role may be eligible for incentive pay and/or equity.
Flexible time off
Wellness resources
Company-sponsored team events
Deep architectural expertise in high-density x86 enterprise server systems, rack-scale power delivery topologies (power-tree modeling, transient analysis), dynamic thermal management, high-performance storage protocols (NVMe-oF, CXL), and multi-node rack architectures.
Extensive experience executing complex system bring-ups, high-speed signal integrity validation (PCIe Gen 5/6, high-frequency buses), and deep-dive hardware failure analysis using advanced lab instruments and telemetry architectures (BMC, Redfish, IPMI, PCIe analyzers, SMART logs).
Proven success building scalable, programmatic validation pipelines (Python/Shell) and rigorous system stress testing methodologies to qualify enterprise-grade L10/L11 infrastructure.
Demonstrated expertise in setting up, validating, and debugging rack-level interconnectivity spanning servers, high-speed switches, active optics, and fabric topologies.
Familiarity with leaf-spine networks, RoCE, RDMA, InfiniBand, and BGP is highly desirable.
This role requires an in-office presence at our **Santa Clara, CA** headquarters
Familiarity with leaf-spine networks, RoCE, RDMA, InfiniBand, and BGP is highly desirable.
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LinkedIn
Fullstack Developer Python/React (Remote)

QUANTEAM - North America (RAINBOW PARTNERS Group)

Santa Clara, CA

Remote
New, Posted 12 hours ago
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LinkedIn
Data Scientist (SQL/Python)

Infotrend

Santa Clara, CA

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Digital Environment / Integrations Engineer 2/3

Northrop Grumman

Sunnyvale, CA 94087

Paid Relocation to Sunnyvale, CA

~ 14 min OnsiteHealth InsurancePaid Time Off

Primary Level Salary Range: $101,000.00 - $151,400.00
Secondary Level Salary Range: $125,300.00 - $187,900.00
Employees may be eligible for overtime, shift differential, and a discretionary bonus in addition to base pay
Annual bonuses are designed to reward individual contributions as well as allow employees to share in company results.
Employees in Vice President or Director positions may be eligible for Long Term Incentives.
Relocation assistance may be available
Health insurance coverage, life and disability insurance, savings plan, Company paid holidays and paid time off (PTO) for vacation and/or personal business.
This position is full-time onsite in Sunnyvale, CA.
Bachelor's Degree in Computer Science, Information Systems, Data Engineering / Data Science, or similar STEM related discipline with 2 years relevant experience; or Master's Degree in Computer Science, Information Systems, Data Engineering / Data Science, or similar STEM related discipline with 0 years relevant work experience
Experience with data architecture, data models, physical database designs, data integration strategy and design for enterprise systems and/or across multiple platforms
Experience with Data Analytics and Data Visualization Tools (e.g Tableau, Power BI) as well as SQL
Experience with basic programming languages (e.g Python, Java or C#)
Familiarity with API protocols (REST, GraphQL, or SOAP) and JSON/XML data formats
Familiarity with Project Lifecycle Management (PLM) tools, processes and integrations (e.g Teamcenter, ENOVIA, Windchill)
Familiarity with configuration management / change management processes and tools
Must be a US citizen
Must be able to obtain and maintain a US Government Secret Clearance
Bachelor's Degree in Computer Science, Information Systems, Data Engineering / Data Science, or similar STEM related discipline with 5 years relevant experience; or Master's Degree in Computer Science, Information Systems, Data Engineering / Data Science, or similar STEM related discipline with 3 years relevant work experience
Must be a US citizen with the ability to obtain a DOD secret clearance
Demonstrated experience in program adoption of digital engineering concepts, methods, and processes including digital thread implementation
Understanding and knowledge of Agile methodologies techniques and activities, including Agile project management tools, (e.g Jira / Atlassian Suite)
Demonstrated experience building secure APIs and familiarity with integration platforms (e.g Azure)
Demonstrated experience in data architecture, enterprise data modeling, and data platform engineering across multiple domains
Demonstrated experience with Project Lifecycle Management and tools (Teamcenter preferred) during design and development phase. Familiarity with manufacturing and sustainment phases are a plus
Familiarity with system modeling languages, approaches, and methodologies, such as SysML as well as MBSE tools (e.g Cameo, IBM Rhapsody)
Familiarity with ERP/SAP integration patterns, MES/PLM/ERP data domains, and cross system data harmonization
Familiarity with managing data and tool integration across classified and disconnected environments
Familiarity with Northrop Grumman Enterprise and/or Sector standards and tools for data strategy and architecture
New, Posted 12 hours ago
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ASIC Design Engineer, Cloud-Scale Machine Learning Acceleration team - Annapurna Labs

Annapurna Labs (U.S.)

Cupertino, CA 95014

~ 15 min OnsiteHealth InsurancePaid Time OffRetirement Benefit

Your Amazon package will include sign-on payments and restricted stock units (RSUs).
USA, CA, Cupertino - 176,600.00 - 247,300.00 USD annually
USA, TX, Austin - 153,600.00 - 215,000.00 USD annually
Host annual and ongoing learning experiences
We're building an environment that celebrates knowledge sharing and mentorship
Amazon also offers comprehensive benefits including health insurance (medical, dental, vision, prescription, Basic Life & AD&D; insurance and option for Supplemental life plans, EAP, Mental Health Support, Medical Advice Line, Flexible Spending Accounts, Adoption and Surrogacy Reimbursement coverage), 401(k) matching, paid time off, and parental leave.
We offer flexibility in working hours
Bachelor's degree in Electrical Engineering or a related field
Experience identifying bugs in architecture, algorithms, functionality, and performance with strong overall debugging skills
Experience verifying at multiple levels of logic from IP blocks to SoCs to full system testing
The ideal candidate will have a strong background in ASIC design, proficiency in SystemVerilog, and excellent analytical and problem-solving skills.
Experience with high-performance and power-efficient designs is highly desirable.
Have familiarity with key components such as interconnects, DMAs, Memory sub-systems, accelerator engines, debug and system level architectures
Master's degree in Electrical or Communications Engineering or a related field
Experience with formal verification techniques including abstraction and end-to-end checking
Experience with ARM and various DSP ISAs
Experience with current and upcoming RF standards in cellular (4G/5G NR), WiMAX, 802.11ad, microwave backhaul, or related broadband wireless standards
Experience with industry standard tools and scripting languages (Python or Perl) for automation
New, Posted 12 hours ago
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LinkedIn
Machine Learning Researcher (Remote | $60–$120/hr)

Synthires

Santa Clara, CA

$120/hr
RemoteFlexible Schedule
iHire
Mechanical Technician

Micro Lithography

Sunnyvale, CA 94089

$33.50/hr

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Don't let the perfect job slip away—upload your resume and we'll personalize your results instantly.

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AI GPU Cache Designer

Intel Corporation

Santa Clara, CA 95051

OnsiteHealth InsurancePaid Time OffRetirement Benefit

Competitive pay, stock bonuses
$220,920.00-311,890.00 USD
Health, retirement, and vacation
Shift 1 (United States of America)
Bachelor's degree in Electrical Engineering, Computer Engineering, or a related field, with 12+ years of experience in RTL design for ASIC/SoC development; OR Master's degree in relevant field with 8+ years of experience; OR PhD in relevant field with 6+ years of experience.
Advanced proficiency in RTL design using Verilog/SystemVerilog and hands-on experience in SoC system integration.
Expertise in standard bus protocols (AXI, AHB) and embedded processor architectures.
Proficiency in scripting languages (e.g., Python, TCL) for automation and design flow customization.
Should you accept this position, you must consent to and pass an extended Background Investigation, which includes (subject to country law), extended education, SEC sanctions, and additional criminal and civil checks.
Strong knowledge of high-speed and low-power design techniques.
Familiarity with industry-standard EDA tools such as HDL simulators (VCS, Questa, IES), lint tools (Spyglass), and FPGA prototyping tools (Xilinx Vivado, Altera Quartus II).
Experience in SoC multicore CPU subsystem design and GPU cache development.
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