Master's or Ph.D. in Electrical Engineering, Electronics Engineering, or a related field.
At least 10 years of experience in analog design, with a focus on high-speed RX and Analog-Front-End design.
Experience with FinFET technologies.
Expertise in high-speed DDR I/O interface, chip-chip interface design and optimization.
Strong knowledge of analog receiver circuits such as CTLE, DFE, FEE.
Sound knowledge of transmitter circuits such as FIR filter, slew rate control, voltage and current mode drivers.
Knowledge of design for reliability ( EM, IR, aging, self-heating ) and layout effects (matching, reliability, proximity effects etc.)
Familiarity with custom digital design (i.e. high-speed logic paths, Serializer, De-serializer).
Proficiency with analog design tools (e.g., Cadence Virtuoso, Maestro, Spectre, HSPICE) and simulation techniques.
Understanding of signal integrity, timing analysis and power management.
Familiarity with industry standards and protocols related to DDR I/O, chiplet I/O and RX design
