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Systems Engineer Mts

Santa Clara,CA

885 Systems Engineer Mts jobs in Santa Clara,CA

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U.S. Army Reserve Logo

U.S. Army Reserve - Oakland, CA

88H Cargo Specialist - Find Success in US Army

Paid Relocation to Oakland, CA

~ 51 min OnsiteEducation AssistanceHealth InsurancePaid Time Off
New, Posted 1 day ago
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Power Integrity Engineer

Everpure

Santa Clara, CA 95050

OnsiteUrgently Hiring

This role may be eligible for incentive pay and/or equity.
$180,000—$270,000 USD
Flexible time off
Wellness resources
Company-sponsored team events
Expertise in power integrity engineering, high-efficiency voltage regulator circuit design, and Power Delivery Network (PDN) optimization for enterprise-scale hardware systems.
Demonstrated proficiency using industry-standard simulation tools (such as Ansys SI-wave, HyperLynx PI, or equivalent software environments) to evaluate and solve complex signal/power integrity challenges.
We are primarily an in-office environment and therefore, you will be expected to work from the Santa Clara, CA office in compliance with Everpure's policies, unless you are on PTO, or work travel, or other approved leave.
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Physical Design Engineer - Static Timing Analysis, Annapurna Labs, Cloud Scale Machine Learning

Annapurna Labs (U.S.)

Cupertino, CA 95014

~ 15 min OnsiteUrgently HiringHealth InsurancePaid Time OffRetirement Benefit

Sign-on payments
Restricted stock units (RSUs)
USA, CA, Cupertino - 176,600.00 - 247,300.00 USD annually
USA, TX, Austin - 153,600.00 - 215,000.00 USD annually
Health insurance (medical, dental, vision, prescription, Basic Life & AD&D; insurance and option for Supplemental life plans, EAP, Mental Health Support, Medical Advice Line, Flexible Spending Accounts, Adoption and Surrogacy Reimbursement coverage)
401(k) matching
Paid time off
Parental leave
Experience scripting or coding
BS + 6yrs or MS + 4yrs or PhD + 2yr in EE/CS
Expertise in timing analysis fundamentals
1+ years doing Static Timing Analysis
1+ years with timing constraint development
Timing Analysis using EDA tools (examples: PrimeTime, Tempus, or others)
Understanding of ASIC Physical Design from RTL-to-GDSII
Understanding of other sign-off activities (ir/em, physical verification, DFT)
1+ years of scripting experience with Tcl, Perl or Python
Expertise developing flows using STA tools (examples: PrimeTime, Tempus or others)
Expertise in ECO flows (examples: PT-DMSA, Tempus-ECO, Tweaker or others)
Experience in advanced nodes - 16nm or below
Expertise in parasitic extraction tools (examples: STAR-RC, Quantus or others)
Expertise on circuit level analysis using tools like SPICE / SPECTRE
Experience with timing of IO interfaces like DDR, HBM, PCIe, Die-to-Die etc.
New, Posted 2 hours ago
Sr. Engineer, Technical Support - Software Automation

Canon USA

San Jose, CA 95164

New, Posted 1 day ago
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Confluent - Distributed Systems Software Engineer

IBM

San Jose, CA 95123

RemoteHealth InsurancePaid Time OffRetirement Benefit

The salary will vary depending on your job-related skills, experience and location.
Pay increment and frequency of pay will be in accordance with employment classification and applicable laws.
Healthcare benefits including medical & prescription drug coverage, dental, vision, and mental health & well being
Financial programs such as 401(k), cash balance pension plan, the IBM Employee Stock Purchase Plan, financial counseling, life insurance, short & long- term disability coverage, and opportunities for performance based salary incentive programs
Generous paid time off including 12 holidays, minimum 56 hours sick time, 120 hours vacation, 12 weeks parental bonding leave in accordance with IBM Policy, and other Paid Care Leave programs. IBM also offers paid family leave benefits to eligible employees where required by applicable law
Training and educational resources on our personalized, AI-driven learning platform where IBMers can grow skills and obtain industry-recognized certifications to achieve their career goals
Diverse and inclusive employee resource groups, giving & volunteer opportunities, and discounts on retail products, services & experiences
You'll be on-call for all of it.
5+ years industry experience designing, building, scaling and supporting backend systems in production
Proficiency in a major programming language, e.g. Java, Go, C / C++, Python, etc
Experience in driving operational excellence for large production services
Proven track record of delivering large-scale, highly available, high quality systems
Hands-on technical expertise in large scale systems engineering or distributed systems
On-call experience handling critical systems
New, Posted 2 hours ago
Sr. Engineer, Technical Support - Software Automation

Canon USA

San Jose, CA 95124

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Physcial Design Engineer

Arrow Electronics

San Jose, CA 95110

~ 16 min OnsiteEducation AssistanceHealth InsurancePaid Time OffRetirement Benefit

Competitive financial compensation, including various compensation plans
Medical, Dental, Vision Insurance
401k, With Matching Contributions
Short-Term/Long-Term Disability Insurance
Health Savings Account (HSA)/Health Reimbursement Account (HRA) Options
Paid Time Off (including sick, holiday, vacation, etc.)
Tuition Reimbursement
Growth Opportunities
Full time
Bachelor's degree in electrical engineering, Computer Engineering, Computer Science, or a related technical field, or equivalent practical experience.
7+ years of hands-on experience in physical design and implementation, encompassing synthesis, PnR, timing convergence and physical verification.
Proficiency in utilizing Electronic Design Automation (EDA) tools such as Innovus, Tempus, and Quantus, as well as a deep understanding of physical design flows and methodologies.
7+ years of experience in physical design roles and related activities.
Proven ability to adhere to tight schedules and implement low-power design techniques.
Experience in System-on-Chip (SoC) design and implementation.
Expertise in sub-7nm node technologies.
Familiarity with industry-standard EDA tools and their capabilities.
Strong scripting skills in TCL to develop custom flows and methodologies on standard EDA tools from Cadence/Synopsys.
Must be able to travel to an Arrow Client office location as requested by Arrow Client leadership.
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Principal Software Engineer with Test Solutions

Raytheon

San Jose, CA 95123

~ 16 min OnsiteFlexible ScheduleHealth InsurancePaid Time OffRetirement Benefit

The salary range for this role is 107,500 USD - 204,500 USD.
Hired applicants may be eligible for annual short-term and/or long-term incentive compensation programs depending on the level of the position and whether or not it is covered by a collective-bargaining agreement.
Hired applicants may be eligible for benefits, including but not limited to, medical, dental, vision, life insurance, short-term disability, long-term disability, 401(k) match, flexible spending accounts, flexible work schedules, employee assistance program, Employee Scholar Program, parental leave, paid time off, and holidays.
Active and transferable U.S. government issued security clearance is required prior to start date.
U.S. citizenship is required, as only U.S. citizens are eligible for a security clearance
Ability to obtain INTERIM U.S. government issued security clearance is required prior to start date
Typically requires a Bachelor's Degree in Science, Technology, Engineering, or Mathematics (STEM) and minimum 8 years prior relevant experience, or an Advanced degree in a related field and minimum 5 years experience.
Experience in developing and integrating software applications using programming languages including but not limited to C++, C#, Java, Python or Visual Basic.
Experience in utilizing integrated development environments and debugging tools to troubleshoot software implementation and ensure integrity of the software products.
Prior experience in Windows Operating System and Microsoft Visual Studio is required.
The ability to obtain and maintain a U.S. government issued security clearance is required. U.S. citizenship is required, as only U.S. citizens are eligible for a security clearance.
Prior experience in laboratory test instrumentation, electronics, and software (Ex. oscilloscopes, power supplies, digital multimeters)
Experience with computer architecture and computer hardware optimization techniques
Experience of the development of software drivers for the operation of computer hardware interfaces
Experience in common computer hardware interface and data protocols such as TCP/IP, UDP, or RS-422
Experience with Unified Modeling Language (UML) to visualize software architecture and design
Experience in software development lifecycles, such as Waterfall and Agile
Experience with Software Configuration Management principles
Experience with Microsoft Azure DevOps Server or GitHub
Experience in leading teams/projects in a technical capacity
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Design Verification Engineer (Einfochips)

Arrow Electronics

San Jose, CA 95134

~ 16 min OnsiteEducation AssistanceHealth InsurancePaid Time OffRetirement Benefit

Competitive financial compensation, including various compensation plans
Solid benefits package
Medical, Dental, Vision Insurance
401k, With Matching Contributions
Short-Term/Long-Term Disability Insurance
Health Savings Account (HSA)/Health Reimbursement Account (HRA) Options
Paid Time Off
Tuition Reimbursement
Growth Opportunities
Full time
At-least **6+ years of experience** in **System Verilog HVL and C++/C**
At-least 6+ year of experience in **UVM.**
Experience in complete verification cycle which includes development of test plan, BFM/Driver/Monitor/Scoreboard component development and integration in test bench, stress/corner testing, failure debug, gate level simulations, assertions, and coverage closure.
Proficient in **SVTB/UVM, C++ testbench**
**Proficient in debug** and assertions coding
**Make/Perl/Python / any script**
**Any protocol experiace is fine**
Understand DSP is a plus
Subversion for Repository and Bugzilla is also a Plus
New, Posted 22 hours ago
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ASIC Design Engineer, Cloud-Scale Machine Learning Acceleration team - Annapurna Labs

Annapurna Labs (U.S.)

Cupertino, CA 95014

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Staff Field Applications Engineer-Data Center DRAM

Micron Technology

San Jose, CA 95113

~ 16 min OnsiteHealth InsurancePaid Time Off

$142,000-$242,000
Additional compensation may include benefits, bonuses, and equity.
Medical, dental and vision plans
Paid family leave
A robust paid time-off program and paid holidays
Full-time position
Bachelor's degree or equivalent practical experience
5+ years in design, product, test, systems, or applications engineering with DRAM, HBM, SSD, or compute systems
Experience with server architecture, hardware design, or system troubleshooting
Knowledge of memory interfaces and memory usage in server environments
Apply Artificial Intelligence tools
Experience with datacenter server management and logging tools (e.g., BMC, EMC, EDAC)
Background in quality and reliability engineering
Willingness to travel and support customer engagements
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