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Electrical+Engineer

Santa Cruz,CA

445 Electrical+Engineer jobs in Santa Cruz,CA

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Manufacturing Engineer (Lean/Automation)

Super Micro Computer

San Jose, CA 95123

~ 40 min Onsite

  • BS/MS in Electrical Engineering, Industrial Engineering, Computer Science, or related field preferred; minimum 2 years of work experience in production or industrial settings, with focus on server troubleshooting and automation.
  • Hands-on experience with production automation enhancement, AOI, and inspection/test coverage for server assemblies; familiarity with PLC programming, HMI, and network protocols (Modbus, OPC UA).
  • Able to read and understand Bills of Material, schematics, and data sheets; holding relevant IPC certifications is advantageous.
  • Proficiency in lean tools (Six Sigma, 5S, Kaizen) and technical instruments like oscilloscopes, multimeters, or diagnostic software for root cause analysis in automated environments.
  • Basic or familiar with Windows and Linux operating systems; experience developing scripts for process optimization.
  • Analytical mindset with strong problem-solving abilities; good communication skills in English, both written and verbal.
  • Ability to work in a fast-paced environment, manage multiple tasks, and provide flexible support as needed.
  • Experience or knowledge in AI infrastructures for AI factory operations as a major plus to help build our capabilities; junior positions available for candidates interested in lean manufacturing careers with emphasis on automation and server quality improvement.
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New Product Manufacturing Engineer

CACI International Inc

Los Gatos, CA 95032

~ 31 min Onsite

  • BA/BS degree in a technical discipline from an accredited college or university.
  • Minimum of five (5) years of experience as a manufacturing engineer or in a related role.
  • Must be a US person.
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New, Posted 22 hours ago
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Field Service Engineer III (TEM/SEM) Southern California - REMOTE

Thermo Fisher Scientific

Santa Cruz, CA

RemoteEducation AssistanceHealth InsurancePaid Time OffRetirement Benefit

  • Bachelor's degree
  • 5+ years of hands-on technical experience in electronic systems, installing, troubleshooting, repairing, and calibrating sophisticated analysis tools such as SEM, TEM, FIB, or similar systems or equivalent combination of education and technical experience in electronic systems
  • A detailed understanding and extensive experience diagnosing and repairing ultra-high vacuum and high voltage systems, or similar systems
  • Ability to deal effectively with customers
  • Excellent interpersonal communication skills; must have a professional working proficiency in English
  • Consistent record of fixing sophisticated systems and subsystems down to the component level
  • Literate in MS DOS and Windows software environments
  • Able to read and interpret schematics
  • Familiar with UHV phenomenon and technology
  • Must have ability to acquire a valid passport and travel regionally and internationally as required
  • Must possess a valid driver's license
  • Physical requirements include the ability to lift up to 50 lbs.
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Troubleshooter

PG&E Corporation

Santa Cruz, CA 95062

$75.22/hr
Onsite

  • Must be at least 18 years of age
  • High School diploma or GED
  • Must possess a valid California Class C Drivers License by first day of employment
  • CA CDL Class A Permit, or equivalent, may be required for certain headquarters based on operational need
  • Ability to wear company provided Personal Protective Equipment (PPE)
  • Ability to lift and carry up to 100 pounds
  • Ability to work and drive in all types of weather and road conditions
  • Capable to work extended hours, nights, weekends and holidays
  • Ability to work shift schedule
  • Completion of a federal or state sanctioned lineworker apprenticeship with approved supporting documentation and/or union or union-affiliated sponsored lineworker apprenticeship
  • Two (2) years work experience as a Journey level Lineworker
  • Must live within 30 minutes of respective headquarters to meet requirements for emergency work
  • If hired as Provisional, must complete the provisional training plan within one year from hire date
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Micro-architect/Logic Designer, Coherent Interconnect

Samsung Electronics Co.

San Jose, CA 95123

~ 40 min OnsiteEducation AssistanceHealth InsurancePaid Time OffRetirement Benefit

  • 10+ years of experience with a Bachelor's degree in Computer Science/Computer Engineering/relevant technical field, or 8+ years of experience with a Master's degree, or 6+ years of experience with a PhD
  • Strong background owning and driving the RTL design of various sub-blocks of the coherent interconnect or memory controller or LLC for the high performance digital designs
  • Demonstrated successful architectural through RTL design experience on high performance digital designs
  • Verilog expertise is required as is a deep understanding of ASIC design flow including RTL design, verification, logic synthesis, prototyping, DFT, timing analysis, floor-planning, ECO, bring-up & lab debug.
  • Knowledge of system caches and directory snoop filter protocols.
  • Familiarity with different on-chip network topologies: mesh, ring, crossbar.
  • Experience in leading and mentoring a team of engineers.
  • Knowledge of in Arm AMBA5 CHI, AMBA4 ACE or AXI coherent interconnect and bus protocols
  • Knowledge of memory subsystem design including coherent cache design.
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Sr. QA Engineer - IP Routing

CIENA

San Jose, CA 95113

Flexible Schedule
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Sr. System RTL Designer/Architect

Advanced Micro Devices

San Jose, CA 95124

Hybrid~ 40 min

  • Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or related field
  • Senior-level System RTL designer with a strong background or passion for IP architecture
  • Define IP features and capabilities; own architecture and micro-architecture requirements
  • Drive technical specifications for IP blocks and provide direction to execution teams
  • Align and optimize hardware (silicon), firmware, and feature enablement for performance and power
  • Collaborate cross-functionally to identify risks and resolve architecture-level issues
  • Own architecture analysis and support feature-change requests from marketing/business teams
  • Partner with design teams on area/floorplan refinement, timing targets, verification test plans, and pre-silicon debug/performance sign-off
  • Support post-silicon teams for performance tuning, power optimization, and issue debug
  • This role is not eligible for visa sponsorship
  • LI-LC3
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Radio DAS Technician

Day Wireless Systems

San Jose, CA 95112

New, Posted 13 hours ago
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Software Development Manager, Network Conrol Plane

Amazon Data Services

Cupertino, CA 95014

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High Speed Analog I/O designer

Broadcom

San Jose, CA 95123

~ 40 min OnsiteHealth InsurancePaid Time OffRetirement Benefit

  • Master's or Ph.D. in Electrical Engineering, Electronics Engineering, or a related field
  • At least 10 years of experience in analog design, with a focus on high-speed RX and Analog-Front-End design
  • Experience with FinFET technologies
  • Expertise in high-speed DDR I/O interface, chip-chip interface design and optimization
  • Strong knowledge of analog receiver circuits such as CTLE, DFE, FEE
  • Knowledge of transmitter circuits such as FIR filter, slew rate control, voltage and current mode drivers
  • Knowledge of design for reliability ( EM, IR, aging, self-heating ) and layout effects (matching, reliability, proximity effects etc.)
  • Familiarity with custom digital design (i.e. high-speed logic paths, Serializer, De-serializer)
  • Proficiency with analog design tools (e.g., Cadence Virtuoso, Maestro, Spectre, HSPICE) and simulation techniques
  • Understanding of signal integrity, timing analysis and power management
  • Problem-Solving: Strong analytical and problem-solving skills, with the ability to resolve complex design challenges
  • Communication: Excellent verbal and written communication skills, with the ability to clearly convey technical information to stakeholders
  • Teamwork: Ability to work effectively within a cross-functional team and manage multiple priorities
  • Familiarity with industry standards and protocols related to DDR I/O, chiplet I/O and RX design
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