Field-Programmable Gate Arrays Engineer
Coretek Labs
Santa Clara,CA,
Senior Physical Design Engineer
Mirafra Technologies
San Jose,CA,
CPU Core Micro-architect & RTL Engineer
I Machines
Santa Clara,CA,
Senior Staff Engineer, Electrical Design
HK Firm
Fremont,CA,
Senior Principal C++ Software Engineer - Protium Prototyping Platform Complier (R48597/as)
Cadence
San Jose,CA,
Senior Package Design Engineer
Astera Labs
Fremont,CA,
Physical Design Engineer
Acceler8 Talent
Fremont,CA,
Product Design Engineer
Skip
Hayward,CA,
Linux Virtualization/Confidential Computing Engineer
GMI Cloud
Mountain View,CA,
Physician Assistant or Nurse Practitioner
Simonmed Imaging
San Francisco,CA,