3623 Principal Design Verification Engineer jobs in San Jose,CA

10+ years of experience with a Bachelor's degree in Computer Science/Computer Engineering/relevant technical field, or 8+ years of experience with a Master's degree, or 6+ years of experience with a PhD
Strong background owning and driving the RTL design of various sub-blocks of the coherent interconnect or memory controller or LLC for the high performance digital designs
Demonstrated successful architectural through RTL design experience on high performance digital designs
Verilog expertise is required as is a deep understanding of ASIC design flow including RTL design, verification, logic synthesis, prototyping, DFT, timing analysis, floor-planning, ECO, bring-up & lab debug.
Knowledge of system caches and directory snoop filter protocols.
Familiarity with different on-chip network topologies: mesh, ring, crossbar.
Experience in leading and mentoring a team of engineers.
Knowledge of in Arm AMBA5 CHI, AMBA4 ACE or AXI coherent interconnect and bus protocols
Knowledge of memory subsystem design including coherent cache design.

Design Engineer V

West Coast Consulting Llc

Sunnyvale, CA 94087

Northrop Grumman

Sunnyvale, CA 94087

Bachelor's degree in a related STEM field with a minimum of 5 years of experience in Quality, Quality Engineering, Program Management, Engineering Management or Manufacturing; (OR 3 or more years of experience with a Master's degree).
Experience with quality engineering principles, manufacturing operations, product inspection, test & evaluation, reliability, root cause analysis, defect analysis, inspection methods, control of nonconforming material, product sell off, shipping and product support as they apply to quality.
Experience with ISO 9001 / AS9100 Quality Management System certification process.
Ability to obtain a DoD Secret clearance.
U.S. citizenship required